VLSI Design
- Lecture Notes, Study Materials and Important questions answers
Subject : VLSI Design
MOS TRANSISTOR PRINCIPLE
COMBINATIONAL LOGIC CIRCUITS
- Circuit Families and Its Comparison - Answer (click here)
- Low Power Logic Design - Answer (click here)
- Sequencing Static Circuits - Answer (click here)
- Circuit Design of Latches and Flip Flops - Answer (click here)
- Static Sequencing Element Methodology - Answer (click here)
- Sequencing Dynamic Circuits - Answer (click here)
- Synchronizers - VLSI Design - Answer (click here)
- Important Short Questions and Answers: Combinational and Sequential Circuit Design - Answer (click here)
SEQUENTIAL LOGIC CIRCUITS
- Circuit Families and Its Comparison - Answer (click here)
- Low Power Logic Design - Answer (click here)
- Sequencing Static Circuits - Answer (click here)
- Circuit Design of Latches and Flip Flops - Answer (click here)
- Static Sequencing Element Methodology - Answer (click here)
- Sequencing Dynamic Circuits - Answer (click here)
- Synchronizers - VLSI Design - Answer (click here)
- Important Short Questions and Answers: Combinational and Sequential Circuit Design - Answer (click here)
DESIGNING ARITHMETIC BUILDING BLOCKS
IMPLEMENTATION STRATEGIES
CMOS TECHNOLOGY
- A Brief History of CMOS Technology - Answer (click here)
- MOS Transistor - Answer (click here)
- Ideal I-V characteristics of MOS Transistor - Answer (click here)
- CV characteristics - Answer (click here)
- Non ideal I-V effects - Answer (click here)
- DC Transfer Characteristics of CMOS Inverter - Answer (click here)
- CMOS Technologies - Answer (click here)
- BiCMOS Technology Fabrication - Answer (click here)
- CMOS Layout Design Rules - Answer (click here)
- CMOS Process Enhancements - Answer (click here)
- Technology Related CAD Issues - CMOS Technology - Answer (click here)
- Manufacturing Issues - CMOS Technology - Answer (click here)
- Important Short Questions and Answers: VLSI Design - CMOS Technology - Answer (click here)
CIRCUIT CHARACTERIZATION AND SIMULATION
- Delay Estimation - Answer (click here)
- Logical Effort - Answer (click here)
- Transistor Sizing - Answer (click here)
- Power Dissipation - VLSI Design - Answer (click here)
- Interconnect - VLSI Design - Answer (click here)
- Design Margin - VLSI Design - Answer (click here)
- Reliability - VLSI Design - Answer (click here)
- Scaling - VLSI Design - Answer (click here)
- Spice Tutorial - Answer (click here)
- Device Models - VLSI Design - Answer (click here)
- Device and Circuit Characterization - Answer (click here)
- Interconnect Simulation - Answer (click here)
- Important Short Questions and Answers: Circuit Characterization and Simulation - Answer (click here)
COMBINATIONAL AND SEQUENTIAL CIRCUIT DESIGN
- Circuit Families and Its Comparison - Answer (click here)
- Low Power Logic Design - Answer (click here)
- Sequencing Static Circuits - Answer (click here)
- Circuit Design of Latches and Flip Flops - Answer (click here)
- Static Sequencing Element Methodology - Answer (click here)
- Sequencing Dynamic Circuits - Answer (click here)
- Synchronizers - VLSI Design - Answer (click here)
- Important Short Questions and Answers: Combinational and Sequential Circuit Design - Answer (click here)
CMOS TESTING
- Need For Testing - Answer (click here)
- Testers and Test Programs - Answer (click here)
- Text Fixtures - Answer (click here)
- Logic Verification - Answer (click here)
- Silicon Debug Principal - Answer (click here)
- Manufacturing Test - Answer (click here)
- Designs For Testability - Answer (click here)
- Boundary Scan - Answer (click here)
- Important Short Questions and Answers: VLSI Design - CMOS Testing - Answer (click here)
SPECIFICATION USING VERILOG HDL
- Specification Using Verilog HDL: Basic Concepts - Answer (click here)
- Identifiers - verilog code - Answer (click here)
- Gate Primitives - Answer (click here)
- Gate Delays - Verilog HDL - Answer (click here)
- Operators - Verilog HDL - Answer (click here)
- Timing Controls - Verilog HDL - Answer (click here)
- Procedural Assignments Conditional Statements - Answer (click here)
- Data Flow and RTL - Answer (click here)
- Structural Gate Level Switch Level Modeling - Answer (click here)
- Design Hierarchies - VLSI Design - Answer (click here)
- Behavioural and RTI Modeling - Answer (click here)
- Testbenches - Answer (click here)
- Structural Gate Level Description of Decoder - Answer (click here)
- Important Short Questions and Answers: Specification Using Verilog HDL - Answer (click here)
- Important Short Questions and Answers: VLSI Design - Answer (click here)
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